1. Field
Embodiments of the disclosure generally relate to a method and apparatus for forming a thin film transistor device.
2. Description of the Background Art
Several trends in the evolution of flat screen displays are larger screen sizes, smaller pixels, LED-based pixels, and reduced display power consumption. These trends have resulted in challenging design requirements for the formation of thin film transistors (TFTs) that can meet these needs. Because Indium Gallium Zinc Oxide (IGZO) can be made with a carrier mobility 20-50 times greater than that of amorphous silicon, TFTs with IGZO channels can be made smaller, more transparent and less power-consuming than TFTs with amorphous silicon channels.
TFTs can be formed by depositing and lithographically patterning a series of layers disposed over a substrate such as glass. These layers include conducting layers, dielectric layers and a semiconducting layer. Semiconducting materials such as amorphous silicon or metal-oxide semiconductors (e.g., IGZO) can be used to form a semiconducting channel region between a source and a drain of a TFT device. Semiconducting materials can be deposited using methods such as physical vapor deposition (PVD, or sputtering), atomic layer deposition (ALD), and chemical vapor deposition (CVD).
Each of the described methods of depositing an IGZO layer has its own set of challenges and problems. First of all, PVD IGZO films are limited to the stoichiometries of the PVD targets, which are manufactured and used to form TFTs with considerable investments of money and time for a researcher studying a new stoichiometric combination of IGZO film. Targets are commercially available that are 1:1:1:4 (indium:gallium:zinc:oxygen ratios), which may be referred to as 1:1:1 where it is presumed that the metal components are completely oxidized. Similarly, some other stoichiometries are readily available. Any requested indium-gallium-zinc target stoichiometry can be custom-manufactured by hot-pressing together the mixed powder oxides In2O3, Ga2O3, and ZnO in the correct proportions with a cycle time on the order of weeks or months. This not only limits the speed of PVD IGZO process development, but limits complexity of a practically deposited structure. A PVD stoichiometric bi-layer process can require two separate PVD chambers, which is more expensive in production than a single-chamber process. In this disclosure, the words “layer” and “film” are used interchangeably, and the term “sublayer” is meant to denote a part of a layer.
Second, while ALD deposited IGZO can meet TFT carrier density requirements, an ALD IGZO process is a very slow, or low-throughput, process. The low throughput problem found with ALD processes is partially solved by using ALD for a first complete layer, or nucleation layer, followed by a CVD depositing of IGZO to complete the semiconducting layer which can exhibit high carrier density. In general, one skilled in the art can appreciate that the properties of a nucleation film can define substantially those properties of a subsequently deposited bulk film. In the case of an ALD-plus-CVD IGZO processing, faster CVD depositing can produce, within a shorter time, a bulk film whose characteristics are close to those of an ALD-only IGZO process. However, an ALD-plus-CVD IGZO process is a relatively low-throughput process sequence (compared to a CVD-only IGZO process), which can require the use of two separate processing chambers.
Third, CVD-only IGZO processes to date have resulted in films whose carrier densities are below TFT design requirements for IGZO layers.
Another problem with IGZO layers is their susceptibility to environmental degradation, reported as the diffusion of hydrogen atoms into the IGZO active layer, which affects the transistor's properties. Moving substrates between processing systems exposes the unprotected IGZO top layer to atmospheric humidity, which can be absorbed into and on the surface of the exposed film. Native oxides can also form on materials exposed to air.
Therefore, there is a need for a method and apparatus for forming a thin film transistor device that includes an indium gallium zinc oxide (IGZO) layer that solves the problems described above.